This application is related to U.S. patent application Ser. No. 03/085847, "Fine Flip Chip Interconnection" Attorney docket No. D/98248 (Common Assignee) filed concurrently herewith.
This Application is related to flip chip bonding of two microchips and more particularly to fabrication of interconnections for bonding pads with a pitch less than 12 microns.
Typically, flip chip bonding is used when two chips have to be physically and electrically connected to each other. Due to the increasing demand for additional capacity or function on integrated circuit chips, the number of bonding pads and as a result, the number of interconnects of each chip needs to be increased. However, there is limited space at the edges of each chip. Therefore, in order to increase the number of the bonding pads, the pitch between the bonding pads needs to be decreased.
Conventional interconnection technologies such as wire bonding and tape automated bonding (TAB) are only capable of connecting bonding pads with a pitch of 75 microns or above. The finest achievable pitch for Anisotropic conductive Film (AFC) is about 50 to 75 microns. Traditionally, flip chip technology is able to connect 5 micron bonding pads with a 25 micron pitch and a 7 micron bump height. Bump height is referred to the height of the solder bump (interconnect) on each bonding pad and it is critical because the height of the two joining solder bumps keeps the two chips apart from each other. Typically, the solder bumps are created by electroplating, electroless plating, or dip soldering. However, neither approach is capable of producing bump pitch less than 25 microns.
It should be noted that fabricating a bonding pad with any size and pitch is possible. However, at fine pitches, it is the interconnect such as the solder bump that is problematic.
Referring to FIG. 1, there is shown a conventional flip chip technology. In FIG. 1, there are two chips 10 and 12 which will be bonded together through the solder bumps 14 and 16 respectively. Each solder bump 14 and 16 is created over a bonding pad 18 and 20 respectively via electroplating, electroless plating, or dip soldering. Typically, the solder should be formed on the metal bonding pads and not on the oxide layers 22 and 24. However, since plating of the metal is continued to create the required height h, the solder bumps 14 and 16 overplate on the oxide layers 22 and 24 respectively. Due to the overplating of the solder bumps 14 and 16 onto the oxide layer 22 and 24, the pitch p of the bonding pads can not be reduced to less than 25 microns.
In addition to the problem of reducing the pitch of the bonding pads, to a pitch less than 25 microns, the alignment between the interconnects of the two chips is also problematic. Due to a fine pitch such as 10 microns between the interconnects, any misalignment can create a bridge between the incorrect bonding pads. For example, referring to FIG. 2, there is shown a misaligned flip chip in which each solder bump a, b, and c touch two solder bumps a' and b', b' and c', and c' and d' respectively and create an undesirable bridge with solder bumps b', c' and d' respectively.
Furthermore, in a conventional flip chip bonding, the solder joints (two joined solder bumps) are exposed to air which can lead into the deterioration of the solder bumps due to the temperature and humidity.
It is an object of this invention to fabricate interconnections with a pitch less than 15 microns, provides an alignment means and seals the solder bumps of each chip to prevent corrosion.